Trankley Mahler

19-Bit Multi-Cycle Computer

About

This project involves the creation of a unique 19-bit Instruction Set Architecture (ISA) and a corresponding multi-cycle computer. It was designed to implement the ISA using Verilog and aimed at providing a deep understanding of how microprocessors are designed and how they function within digital systems.

Design Objectives

  1. Custom ISA Development: To design a unique ISA that would support basic computational tasks and learn the principles behind instruction set architecture.
  2. Real-World Application: To simulate the functionality of real-world computers using a simplified model that can be expanded or modified for educational purposes.
  3. Hands-On Learning: To offer students and enthusiasts a practical experience in computer architecture and digital design.

Technical Specifications

Implementation Details

Elaborated Design Diagram

coming soon

Educational Impact

Code Sample

Given that other people are currently doing a similar assignment, i wont be providing all of the code, the following was written in Vivado using the C++ coding language: